Staging
v0.8.1
v0.8.1
Revision daf57f25e5690cfaa4636ccf0d113908dc0783a4 authored by Raymond Hettinger on 27 February 2015, 07:21:29 UTC, committed by Raymond Hettinger on 27 February 2015, 07:21:29 UTC
Remove the old comment suggesting that it was desireable to have blocksize+2 as a multiple of the cache line length. That would have made sense only if the block structure start point was always aligned to a cache line boundary. However, the memory allocations are 16 byte aligned, so we don't really have control over whether the struct spills across cache line boundaries.
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PCbuild | ||
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.bzrignore | -rw-r--r-- | 584 bytes |
.gitignore | -rw-r--r-- | 1.1 KB |
.hgeol | -rw-r--r-- | 800 bytes |
.hgignore | -rw-r--r-- | 1.2 KB |
.hgtags | -rw-r--r-- | 7.0 KB |
.hgtouch | -rw-r--r-- | 1.3 KB |
LICENSE | -rw-r--r-- | 12.5 KB |
Makefile.pre.in | -rw-r--r-- | 54.6 KB |
README | -rw-r--r-- | 6.6 KB |
config.guess | -rwxr-xr-x | 41.9 KB |
config.sub | -rwxr-xr-x | 34.9 KB |
configure | -rwxr-xr-x | 448.1 KB |
configure.ac | -rw-r--r-- | 142.4 KB |
install-sh | -rwxr-xr-x | 7.0 KB |
pyconfig.h.in | -rw-r--r-- | 40.5 KB |
setup.py | -rw-r--r-- | 95.6 KB |
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