Staging
v0.5.1
Revision a35adf5b0984758ddc64ced81cfac56fa15fd94a authored by Raymond Hettinger on 02 September 2013, 10:23:21 UTC, committed by Raymond Hettinger on 02 September 2013, 10:23:21 UTC
Modern processors tend to make consecutive memory accesses cheaper than
random probes into memory.

Small sets can fit into L1 cache, so they get less benefit.  But they do
come out ahead because the consecutive probes don't probe the same key
more than once and because the randomization step occurs less frequently
(or not at all).

For the open addressing step, putting the perturb shift before the index
calculation gets the upper bits into play sooner.
1 parent a661f45
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.bzrignore -rw-r--r-- 584 bytes
.gitignore -rw-r--r-- 960 bytes
.hgeol -rw-r--r-- 713 bytes
.hgignore -rw-r--r-- 1.2 KB
.hgtags -rw-r--r-- 5.6 KB
.hgtouch -rw-r--r-- 1.2 KB
LICENSE -rw-r--r-- 14.7 KB
Makefile.pre.in -rw-r--r-- 50.4 KB
README -rw-r--r-- 6.6 KB
config.guess -rwxr-xr-x 43.8 KB
config.sub -rwxr-xr-x 34.8 KB
configure -rwxr-xr-x 430.3 KB
configure.ac -rw-r--r-- 132.9 KB
install-sh -rwxr-xr-x 7.0 KB
pyconfig.h.in -rw-r--r-- 39.5 KB
setup.py -rw-r--r-- 92.5 KB

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