Staging
v0.5.1
https://github.com/torvalds/linux
Revision 68ca3e537f12044af05a653fa9d28b4fe80117e8 authored by Haavard Skinnemoen on 03 December 2007, 17:04:11 UTC, committed by Haavard Skinnemoen on 07 December 2007, 13:54:47 UTC
The current implementation of copy_to_user_page() gives "vaddr" to the
cache instruction when trying to sync the icache with the dcache. If
vaddr does not exist in the TLB, the CPU will silently abort the
operation, which may result in the caches staying out of sync.

To fix this, pass the "dst" parameter to flush_icache_range() instead
-- we know this is valid because we just wrote to it.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
1 parent 2507bc1
History
Tip revision: 68ca3e537f12044af05a653fa9d28b4fe80117e8 authored by Haavard Skinnemoen on 03 December 2007, 17:04:11 UTC
[AVR32] Fix copy_to_user_page() breakage
Tip revision: 68ca3e5
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