Staging
v0.5.2
https://github.com/torvalds/linux
History
Tip revision: 1b929c02afd37871d5afb9d498426f83432e71c2 authored by Linus Torvalds on 25 December 2022, 21:41:39 UTC
Linux 6.2-rc1
Tip revision: 1b929c0
File Mode Size
altera-fpga2sdram-bridge.txt -rw-r--r-- 353 bytes
altera-freeze-bridge.txt -rw-r--r-- 697 bytes
altera-hps2fpga-bridge.txt -rw-r--r-- 1.0 KB
altera-passive-serial.txt -rw-r--r-- 988 bytes
altera-pr-ip.txt -rw-r--r-- 276 bytes
altera-socfpga-a10-fpga-mgr.txt -rw-r--r-- 629 bytes
altera-socfpga-fpga-mgr.txt -rw-r--r-- 533 bytes
fpga-bridge.txt -rw-r--r-- 367 bytes
fpga-region.txt -rw-r--r-- 16.8 KB
intel-stratix10-soc-fpga-mgr.txt -rw-r--r-- 372 bytes
lattice,sysconfig.yaml -rw-r--r-- 1.9 KB
lattice-ice40-fpga-mgr.txt -rw-r--r-- 729 bytes
lattice-machxo2-spi.txt -rw-r--r-- 656 bytes
microchip,mpf-spi-fpga-mgr.yaml -rw-r--r-- 968 bytes
xilinx-pr-decoupler.txt -rw-r--r-- 2.0 KB
xilinx-slave-serial.txt -rw-r--r-- 1.6 KB
xilinx-zynq-fpga-mgr.yaml -rw-r--r-- 958 bytes
xlnx,versal-fpga.yaml -rw-r--r-- 634 bytes
xlnx,zynqmp-pcap-fpga.yaml -rw-r--r-- 825 bytes

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