Staging
v0.8.1
https://github.com/torvalds/linux
Raw File
Tip revision: ce9ecca0238b140b88f43859b211c9fdfd8e5b70 authored by Linus Torvalds on 17 September 2023, 21:40:24 UTC
Linux 6.6-rc2
Tip revision: ce9ecca
memory.json
[
    {
        "BriefDescription": "Nonzero segbase 1 bubble",
        "EventCode": "0x5",
        "EventName": "MISALIGN_MEM_REF.BUBBLE",
        "SampleAfterValue": "200000",
        "UMask": "0x97"
    },
    {
        "BriefDescription": "Nonzero segbase load 1 bubble",
        "EventCode": "0x5",
        "EventName": "MISALIGN_MEM_REF.LD_BUBBLE",
        "SampleAfterValue": "200000",
        "UMask": "0x91"
    },
    {
        "BriefDescription": "Load splits",
        "EventCode": "0x5",
        "EventName": "MISALIGN_MEM_REF.LD_SPLIT",
        "SampleAfterValue": "200000",
        "UMask": "0x9"
    },
    {
        "BriefDescription": "Load splits (At Retirement)",
        "EventCode": "0x5",
        "EventName": "MISALIGN_MEM_REF.LD_SPLIT.AR",
        "SampleAfterValue": "200000",
        "UMask": "0x89"
    },
    {
        "BriefDescription": "Nonzero segbase ld-op-st 1 bubble",
        "EventCode": "0x5",
        "EventName": "MISALIGN_MEM_REF.RMW_BUBBLE",
        "SampleAfterValue": "200000",
        "UMask": "0x94"
    },
    {
        "BriefDescription": "ld-op-st splits",
        "EventCode": "0x5",
        "EventName": "MISALIGN_MEM_REF.RMW_SPLIT",
        "SampleAfterValue": "200000",
        "UMask": "0x8c"
    },
    {
        "BriefDescription": "Memory references that cross an 8-byte boundary.",
        "EventCode": "0x5",
        "EventName": "MISALIGN_MEM_REF.SPLIT",
        "SampleAfterValue": "200000",
        "UMask": "0xf"
    },
    {
        "BriefDescription": "Memory references that cross an 8-byte boundary (At Retirement)",
        "EventCode": "0x5",
        "EventName": "MISALIGN_MEM_REF.SPLIT.AR",
        "SampleAfterValue": "200000",
        "UMask": "0x8f"
    },
    {
        "BriefDescription": "Nonzero segbase store 1 bubble",
        "EventCode": "0x5",
        "EventName": "MISALIGN_MEM_REF.ST_BUBBLE",
        "SampleAfterValue": "200000",
        "UMask": "0x92"
    },
    {
        "BriefDescription": "Store splits",
        "EventCode": "0x5",
        "EventName": "MISALIGN_MEM_REF.ST_SPLIT",
        "SampleAfterValue": "200000",
        "UMask": "0xa"
    },
    {
        "BriefDescription": "Store splits (Ar Retirement)",
        "EventCode": "0x5",
        "EventName": "MISALIGN_MEM_REF.ST_SPLIT.AR",
        "SampleAfterValue": "200000",
        "UMask": "0x8a"
    },
    {
        "BriefDescription": "L1 hardware prefetch request",
        "EventCode": "0x7",
        "EventName": "PREFETCH.HW_PREFETCH",
        "SampleAfterValue": "2000000",
        "UMask": "0x10"
    },
    {
        "BriefDescription": "Streaming SIMD Extensions (SSE) Prefetch NTA instructions executed",
        "EventCode": "0x7",
        "EventName": "PREFETCH.PREFETCHNTA",
        "SampleAfterValue": "200000",
        "UMask": "0x88"
    },
    {
        "BriefDescription": "Streaming SIMD Extensions (SSE) PrefetchT0 instructions executed.",
        "EventCode": "0x7",
        "EventName": "PREFETCH.PREFETCHT0",
        "SampleAfterValue": "200000",
        "UMask": "0x81"
    },
    {
        "BriefDescription": "Streaming SIMD Extensions (SSE) PrefetchT1 instructions executed.",
        "EventCode": "0x7",
        "EventName": "PREFETCH.PREFETCHT1",
        "SampleAfterValue": "200000",
        "UMask": "0x82"
    },
    {
        "BriefDescription": "Streaming SIMD Extensions (SSE) PrefetchT2 instructions executed.",
        "EventCode": "0x7",
        "EventName": "PREFETCH.PREFETCHT2",
        "SampleAfterValue": "200000",
        "UMask": "0x84"
    },
    {
        "BriefDescription": "Any Software prefetch",
        "EventCode": "0x7",
        "EventName": "PREFETCH.SOFTWARE_PREFETCH",
        "SampleAfterValue": "200000",
        "UMask": "0xf"
    },
    {
        "BriefDescription": "Any Software prefetch",
        "EventCode": "0x7",
        "EventName": "PREFETCH.SOFTWARE_PREFETCH.AR",
        "SampleAfterValue": "200000",
        "UMask": "0x8f"
    },
    {
        "BriefDescription": "Streaming SIMD Extensions (SSE) PrefetchT1 and PrefetchT2 instructions executed",
        "EventCode": "0x7",
        "EventName": "PREFETCH.SW_L2",
        "SampleAfterValue": "200000",
        "UMask": "0x86"
    }
]
back to top